Job Summary:
Join our exciting startup as a Junior AMS Verification Engineer and be part of a dynamic team that's shaping the future of semiconductor innovation in Jordan. We're looking for a talented engineer to assist in the verification of Analog and Mixed-Signal (AMS) designs. As a Junior AMS Verification Engineer, you'll have the opportunity to work on exciting projects, collaborate with international teams, and contribute to the development of cutting-edge products.
Responsibilities:
• Assist in the development and implementation of verification strategies for AMS designs
• Create and maintain testbenches using languages such as SystemVerilog, Verilog, Verilog-A, and VHDL
• Assist in the creation and execution of tests to validate the functionality of AMS designs
• Analyse and debug test results, identifying and resolving issues as needed
• Collaborate with design teams to identify and prioritise verification requirements
• Participate in the development of verification plans and test cases
Requirements:
• Bachelor's or Master's degree in Electrical/Electronics Engineering, or related field
• 0-2 years of experience in AMS verification
• AMS design knowledge and/or experience is a plus
• Strong knowledge of SystemVerilog, Verilog, Verilog-A, and VHDL
• Experience or knowledge with verification methodologies, such as UVM and OVM
• Strong analytical and problem-solving skills
• Excellent communication skills
• Cadence tool chain knowledge is a plus
• Strong drive and willingness to learn and gain technical knowledge
